Formal Methods in Circuit Design by Victoria Stavridou

By Victoria Stavridou

The speedy progress within the VLSI industry has intended that brands are stressed to convey more and more complicated, trustworthy, and price potent items. Dependability is changing into progressively more vital as pcs turn into an essential component of protection serious platforms. Formal suggestions which have been utilized in software program verification have migrated into the area, the place for quite a few purposes, they've been in a few respects extra profitable. This e-book analyzes the standards in the back of this good fortune and formulates a suite of standards opposed to which a number of techniques to verification could be judged. This includes deciding upon the specifications and the problems affecting the commercial use of formal equipment. Dr. Stavridou additionally offers an total point of view of the sector, offers case reviews of assorted formalisms and eventually describes an algebraic method of the specification and verification of synchronous electronic platforms. This certain publication can be utilized through scholars and lecturers for classes in verification, via designers looking an advent to formal tools, and by means of researchers drawn to algebraic specification.

Show description

Read Online or Download Formal Methods in Circuit Design PDF

Similar microprocessors & system design books

FM8501: A Verified Microprocessor

The FM 8501 microprocessor was once invented as a favourite microprocessor a little just like a PDP-11. The important suggestion of the FM 8501 attempt used to be to work out if it used to be attainable to precise the user-level specification and the layout implementation utilizing a proper good judgment, the Boyer-Moore good judgment; this method accepted an entire routinely checked facts that the FM 8501 implementation absolutely applied its specification.

Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools

The construction blocks of ultra-modern and destiny embedded platforms are complicated highbrow estate parts, or cores, lots of that are programmable processors. routinely, those embedded processors typically were professional­ grammed in meeting languages as a result of potency purposes. this means time­ eating programming, large debugging, and coffee code portability.

Worst-Case Execution Time Aware Compilation Techniques for Real-Time Systems

For real-time platforms, the worst-case execution time (WCET) is the major target to be thought of. characteristically, code for real-time platforms is generated with out taking this aim into consideration and the WCET is computed simply after code iteration. Worst-Case Execution Time acutely aware Compilation suggestions for Real-Time structures offers the 1st entire procedure integrating WCET concerns into the code new release strategy.

Extra info for Formal Methods in Circuit Design

Sample text

Shown below are functions for converting integers into two's complement bit-vectors and back again. 2. I N T E G E R N U M B E R R E P R E S E N T A T I O N 25 (defn compl (x) (if (bitvp x) (if (equal x (btm)) (btm) (bitv (not (bit x)) (compl (vec x)))) (btm))) (defn incr (c x) (if (bitvp x) (if (equal x (btm)) (btm) (bitv (xor c (bit x)) (incr (and c (bit x)) (vec x)))) (btm))) (defn bitn (x n) (if (zerop n) f (if (equal n i) (bit x) (bitn (vec x) (subl n ) ) ) ) ) (defn tc-to-bv (x size) (if (negativep x) (incrt (compl (nat-to-bv (negative-guts x) size))) (nat-to-by x size))) (defn bv-to-tc (x) (if (bitn x (size x)) (minus (bv-to-nat (incrt (by-to-nat x) ) ) (compl x)))) T h e f u n ct i o n s co m p l and i n c r c o m p l e m e n t a b i t - v e c t o r a n d i n c r e m e n t a bitvector respectively.

If they are not bit-vectors or are empty we return the 1-bit wide vector containing the carry input c. Otherwise, we create a new bit-vector with b i t v . The least significant bit is generated by exclusive or'ing together the input carry and the least significant bits of a and b. The rest of the vector is obtained by recursively adding the other bits in a and b with an input carry computed combinationally as the majority function of the bits just exclusive or'ed. Assuming (and ( s i z e p a 4) ( s i z e p b 4) ( b o o l p c ) ) we can prove that the natural number represented by ( b y - a d d e r f a b) is the mathematical sum of those represented by a and b.

The function b y - t o - n a t converts a bit-vector into a natural number. The length of the bit-vector is immaterial. The following two lemmas describe the relationship of composing the above functions. In the Boyer-Moore theorem-proving system, a p r o v e - l e m m a is a request for the system to prove a statement within the logic. If the l e m m a can be proved, knowledge concerning the l e m m a is added to the theorem-prover database. This knowledge can be used later, when the theorem-prover is invoked with another request.

Download PDF sample

Rated 4.28 of 5 – based on 33 votes