Associative Computing: A Programming Paradigm for Massively by Jerry L. Potter

By Jerry L. Potter

Integrating associative processing ideas with hugely parallel SIMD expertise, this quantity explores a version for gaining access to information through content material instead of summary handle mapping.

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Associative Computing: A Programming Paradigm for Massively Parallel Computers

Integrating associative processing thoughts with vastly parallel SIMD know-how, this quantity explores a version for getting access to information by way of content material instead of summary tackle mapping.

Additional info for Associative Computing: A Programming Paradigm for Massively Parallel Computers

Example text

For example, whenever a read statement is executed, the number of rows input is determined and the appropriate number of association entries are allocated in the specified association variable (see Fig. 2-9). An ASC allocate statement and parallel index variables are used if information from two or more associations is to be combined into a new association entry. As illustrated in Fig. 2-10, the index variables xx, yy, and zz flag the association entries involved in the process. The xx and yy indices flag entries in associations I and II that will be used to create the zz entry in association III.

Figure 2-13 shows the total bit-serial addition routine as eight instructions; however, it is possible to combine some of the operations so that as few as four instructions and no temporaries are needed. Figure 2-14 shows the truth table for the addition shown in Fig. 2-13. 2. Bit-Serial Subtraction Bit-serial subtraction is achieved by algebraic addition. That is, the field to be subtracted is complemented and then added. The complementation can be carried out when the bit slice is read just before the addition so that the arguments need to be read only once.

For binary operators, the first two arguments are operands and the third is the result or destination. For unary operators, the first argument is the operand, the second is the result. The first "addition" in Fig. 2-13 is the addition of the carry from the previous bit slice to the bit slice from the first addend. This addition produces a carry, which is saved in the X register, and a partial sum bit, saved in the Y register. The second addition adds the second addend bit to the partial sum, producing the carry-out bit slice and a sum bit slice.

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